TLB Miss (& Mod) Lookup

One critical thing for good performance on MIPS is the speed of the TLB handler. Since a 64 entry TLB with a 8KB page size can address a maximum of 1MB of address space, you really want this to be as efficient as possible since you will likely reloading TLB quite often.

My current idea is to have per-cpu 32K entry caches of PVP tables. As the number that are mapped, so will the number of allocated PVP tables. If all 32K are allocated, that will mean a total of 128MB will be used to lookup between 16 to 32 GB of virtual address space. Given that ASIDs are per-cpu, the ASID of the PV entry will placed in the upper bits of the PV address and masked out before use. As the system starts, all 32K entries will point to a common PVP table and as entries are added, additional PVP pages will be allocated and PVs distributed among them.

To look up a VPN one would do (via xkseg or kseg0):

randomizer = (vpn <>pm_randomizer)

idx = ((vpn ^ randomizer) >> 10) & 0x3fff;

pvp = pvps[idx];

idx = (vpn ^ ramdomizer) & 0x3ff ;

pv = pvp[idx];

Note that ASIDs are not used to compute the PVP or PV index since they are fleeting and would require updating of the PVPs. It could be done but might incur more overhead that I'd like.

if the pv doesn't matter the asid/vpn, a look at a secondary location in the PV page at TBD relatively offset will done.

If that, fails then fallback to a pmap_lookup or uvm_fault.

This is less an inverted page table than a "global" page table.